Re: [PATCH] add delay between port write and port read
From: Mikulas Patocka (mpatocka@xxxxxxxxxx)
Date: Tue Feb 19 2019 - 12:39:00 EST
On Tue, 19 Feb 2019, Arnd Bergmann wrote:
> On Tue, Feb 19, 2019 at 2:44 PM Mikulas Patocka <mpatocka@xxxxxxxxxx> wrote:
> > On Tue, 19 Feb 2019, Mikulas Patocka wrote:
> > > The patches cd0e00c106722eca40b38ebf11cf134c01901086 and
> > > 92d7223a74235054f2aa7227d207d9c57f84dca0 fix a theoretical issue where the
> > > code didn't follow the specification. Unfortunatelly, they also reduce
> > > timing when port write is followed by a port read.
> > >
> > > These reduced timing cause hang on boot on the Avanti platform when
> > > probing serial ports. This patch adds memory barrier after the outb, outw,
> > > outl functions, so that there is delay between port write and subsequent
> > > port read - just like before.
> > >
> > > Fixes: cd0e00c10672 ("alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering")
> > > Cc: stable@xxxxxxxxxxxxxxx # v4.17+
> > you can also add:
> > Tested-by: Mikulas Patocka <mpatocka@xxxxxxxxxx>
> Acked-by: Arnd Bergmann <arnd@xxxxxxxx>
> but I notice you are missing Signed-off-by.
I forgot about it. You made that patch, so there should be your signed-off
Signed-off-by: Mikulas Patocka <mpatocka@xxxxxxxxxx>
> We clearly need this patch, but I assumed the alpha maintainers would pick
> it up, not me. I merged the original changes since they were cross-architecture,
> but I don't normally take patches for a particular architecture through the
> asm-generic tree (or the soc tree for that matter).