Re: [PATCH] add delay between port write and port read

From: Mikulas Patocka (mpatocka@xxxxxxxxxx)
Date: Wed Feb 20 2019 - 10:02:56 EST

On Tue, 19 Feb 2019, Maciej W. Rozycki wrote:

> On Tue, 19 Feb 2019, Mikulas Patocka wrote:
> > > As I say, shouldn't the barrier be in `iowriteX' instead? I don't
> > > suppose these are allowed to be weakly ordered.
> > >
> > > Maciej
> >
> > iowriteX is for memory-mapped I/O, out[bwl] is for I/O ports.
> Well, actually `iowriteX' is generic and for MMIO you have `writeX'.
> See lib/iomap.c, the comment at the top and e.g. `iowrite8' there for an
> actual proof. Alpha may have an oddball implementation, but there you go.
> Drivers will assume they can do `iowriteX' to any kind of I/O resource,
> and ordering must be respected as per Documentation/memory-barriers.txt.
> Maciej

So, do you think that the barrier whould be added to iowriteX and slow
down every MMIO access?