Re: [PATCH] add delay between port write and port read

From: Arnd Bergmann (arnd@xxxxxxxx)
Date: Wed Feb 20 2019 - 11:52:38 EST


On Wed, Feb 20, 2019 at 4:38 PM Maciej W. Rozycki <macro@xxxxxxxxxxxxxx> wrote:
> On Wed, 20 Feb 2019, Mikulas Patocka wrote:
> > > Well, actually `iowriteX' is generic and for MMIO you have `writeX'.
> > > See lib/iomap.c, the comment at the top and e.g. `iowrite8' there for an
> > > actual proof. Alpha may have an oddball implementation, but there you go.
> > > Drivers will assume they can do `iowriteX' to any kind of I/O resource,
> > > and ordering must be respected as per Documentation/memory-barriers.txt.
> >
> > So, do you think that the barrier whould be added to iowriteX and slow
> > down every MMIO access?
>
> We need it either for `outX' and `iowriteX' calls operating on port I/O
> resources, or for neither of them, both at a time, to ensure the required
> consistency between the two interfaces. If that badly affects MMIO (and
> is not required there; please remind me what the exact justification to
> use `mb' here is, as it's not entirely clear to me from the commit
> message; `mb' is a barrier and not means for a delay), then we need to
> find a away for `iowriteX' to tell port I/O and MMIO accesses apart and
> only apply the barrier for the former kind.

Will Deacon is in the process of sanitizing our documentation for this,
and this part is still under discussion.

I personally don't see a problem with having different barrier
semantics between outb() and iowrite8(), the reasoning being that
any caller of iowriteX() would already have to be careful about
posted writes when iowriteX is backed by ioremapped memory
space rather than port I/O.

I think the more important question we have to figure out here
however is why exactly the barrier is needed for alpha, as I still
don't fully understand the issue:

a) maybe the barrier here is only needed to provide the
non-posted PCI write behavior required by outb(), in that
case I would suggest adding the barriers to outX() but
perhaps not iowriteX()

b) or the barriers are in fact needed for /any/ I/O operation
on alpha, to ensure that a store is ordered with regard to
a following load. If this is the case, we need the barriers
in all three families: outX(), writeX() and iowriteX().

Arnd