Re: [PATCH] add delay between port write and port read
From: Maciej W. Rozycki (macro@xxxxxxxxxxxxxx)
Date: Wed Feb 27 2019 - 13:40:56 EST
On Wed, 27 Feb 2019, Linus Torvalds wrote:
> > I suppose you might need the mb() before *and* after the I/O access in the
> > read case. The idea with readX()/ioreadX() is that you should be able to
> > do something like:
> Yeah, that sounds reasonable.
> You might relax the barrier after the readX() to just a rmb(), which
> might make the performance impact slightly less noticeable and might
> be sufficient in practice. But I guess once you do IO, it's not like
> the CPU barrier will be the limiting case.
FWIW in the MIPS port we've had it as `rmb' since Sinan's commit
a1cc7034e33d ("MIPS: io: Add barrier after register read in readX()"), but
then we expand this macro to a hardware SYNC instruction anyway (rather
than SYNC_RMB or at most SYNC_MB), which is stronger these days even as it
has been at one point redefined in the architecture as a completion rather
than an ordering barrier.
NB MIPS also has SYNC_ACQUIRE and SYNC_RELEASE too, which are assymetric
load <= load/store and load/store <= store ordering barriers respectively,
obviously meant for locking.
> So maybe just a full mb() and see if anybody notices. Better to have
> working code than random failures.
For Alpha it doesn't matter anyway as it doesn't have a separate read
barrier. Although I'd prefer to have the expected semantics recorded even
if the underlying implementation is the same, as otherwise it gets even
more confusing to people than it already is.