Jeff> If the memory interface *does* run @ 33MHz, the poor CPU is
Jeff> going to be stalling all the time no matter what kind of
Jeff> memory/cache you have.
The memory interface timing is controlled by a bunch of timing
registers that count cycles. If you have fast memory, reprogram the
timing registers and it will go faster. I doubt DEC would intentially
program them to be slower than what's required by the DRAM.
Unfortunately, those registers are write-only, so you can't just read
them back and find out what they're set to.
Jeff> Sure, memory systems like that are more expensive, but I think
Jeff> it's generally due to the increased number of pins/traces.
The LCA saves pins by integrating a memory controller onto the chip.
That means much fewer address pins because DRAM wants
row-/column-addresses anyway. The databus is still 64 bits wide (as
it is in all pre-AlphaStation 5 workstations from DEC, AFAIK). This
stuff, btw, is all documented in the "DECchip 21066 and DECchip 21068
Alpha AXP Microprocessors" hardware reference manual (order number
EC-N2681-72).
Jeff> Have you checked the price of a 21064 *chip* lately? Eek.
Jeff> Those CPUs cost many thousand dollars. Maybe as much as US$4K
Jeff> for the faster ones. It's the multiplexed bus, lower pin
Jeff> count, and greater simplicity that makes the 21164 so much
Jeff> cheaper. (If anyone has recent OEM pricing, I would be
Jeff> interested to see the comparison.)
I think you're confusing some things: the 21164 (aka ev5) costs around
$2500, the 21066 (aka lca) costs around $500, so I'd guess the 21064
lies somewhere inbetween (which doesn't make it "many thousands").
Also, the 21066 is *more complex* than the 21064. The former contains
the functionality of the latter plus an integrated memory and I/O
controller (PCI).
Jeff> A 12ns async cache isn't nearly fast enough for a CPU running
Jeff> at 275 MHz. Burst cache, RDRAM, or possibly both are needed
Jeff> to approach the full capabilities of a CPU that fast.
Maybe that's why the Alpha CPUs have first-level caches that are
on-chip? Notice that the point of the Noname boards is to allow
building (relatively) low-cost systems. The point is not to squeeze
the last drop of performance out of the CPU. The point is to build as
fast a system as you can with "off-the-shelf" components. It
certainly is the case that I could not have afforded an Alpha system
other than the Noname. Whether the Noname is as fast as it can be
(without increasing its price), I cannot judge. But, for my purposes,
it's definitively a nice system. I surely do hope that there will be
real (low-end) Alpha clone manufacturers in the future.
>> And, once again: I still think that Linux/Alpha should also
>> provide a user-level environment with 32-bit pointers/longs.
>> This can reduce both memory-consumption and memory-bandwidth
>> requirements. But before this happens, somebody needs to find
>> the time and actually do it.
Jeff> Uh-oh, back to multiple memory models.. :) But, right again.
Jeff> :)
No, multiple pointer/long sizes. No segmentation or anything like
that, just a smaller address-space. Any reasonably portable
application must tolerate varying pointer/long sizes anyway.
--david