>>>>> On Sun, 17 Dec 95 14:12:19 MET, "Ka'plaagh 17-Dec-1995 1308 +0000" <rusling@rdgeng.enet.dec.com> said:
Dave.Rusling> Basically, I had to unfix/refix some fixups in
Dave.Rusling> bios32.c around level/edge sensitive interrupts. I've
Dave.Rusling> still got the file on my development system. I also
Dave.Rusling> have a dd of an aboot disk which worked. I've put
Dave.Rusling> both on gatekeeper in
Dave.Rusling> ~ftp/pub/Digital/Linux-Alpha/Miniloader/misc (note
Dave.Rusling> that they'll not actually appear to the outside world
Dave.Rusling> until later tonight EST.
David.M> Can somebody find out why the new code fails to work
David.M> properly on the Avanti/Mustang? The only difference
David.M> between the new and the old code is that the latter always
David.M> programs irqs 9, 10, 11, and 15 to be level sensitive where
David.M> as the new code only programs the irqs that are really used
David.M> by PCI device to be level sensitive. The new code is
David.M> definitively the right thing to do, now we just need to
David.M> figure why it fails on the Avanti/Mustang. Maybe somebody
David.M> could put a printk() in the avanti_and_noname_fixup() code
David.M> to see what irqs get programmed to be level-sensitive?
Not that I enjoy responding to my own mails but while trying to build
a new MILO for my Noname box, I found that the interrupt problem
wasn't Avanti/Mustang specific after all. It seems that the new code
never actually worked. I just didn't notice because the old MILO that
I had installed setup the system correctly. Could somebody with an
Avanti/Mustang try this patch and let me know how it works?
--david
--- linux/arch/alpha/kernel/bios32.c~ Sat Dec 23 04:58:56 1995
+++ linux/arch/alpha/kernel/bios32.c Tue Jan 2 01:01:24 1996
@@ -643,9 +649,13 @@
PCI_INTERRUPT_LINE, dev->irq);
#endif
}
- /* now, set any level-triggered IRQs */
- if (level_bits)
- outw(level_bits, 0x4d0);
+ /*
+ * Now, make all PCI interrupts level sensitive. Notice:
+ * these registers must be accessed byte-wise. outw() doesn't
+ * work, for some reason.
+ */
+ outb((level_bits >> 0) & 0xff, 0x4d0);
+ outb((level_bits >> 8) & 0xff, 0x4d1);
enable_ide(0x26e);
}