Re: performance of 21164-300 vs P6-200
Arno PAHLER (paehler@atlas.rc.m-kagaku.co.jp)
Wed, 12 Jun 1996 14:10:05 +0900
I think the main problem is that machines like the Alpha are very sensitive
to things like instruction scheduling, pipeline stalls, cache misses etc -
and that compilers like gcc are very INsensitive to it - on a P5 I had cases
where, writing assembler, I could improve on gcc by a factor of 2.4 using
Intel's famous fxch instruction - gcc for Intel has improved in the mean-
time - and I have learned to write C programs that FORCE gcc to generate
fxch (which cost 4 cycles on a 486, but are 0 cycles on a P5) freely with
significant improvements in performance.
Arno