Mark Hahn wrote:
>
> how do you figure that? the code generated is either inc jiffies
> (for non-volatile), or load, inc, store for volatile. in either
> case, the memory system sees one load and one store. in the volatile
> case, I don't think gcc can move the load and store very far apart.
You are talking about RISC architectures. On i386 "incl" instruction
is atomic and is protected by memory lock even on UP machines. In
this case move up/down in the instruction stream is important.
AFAIK this was problem with gcc-2.7.x and objects defined volatile
on i386 family. I will not be surprised if newer gcc is ok.
Anyway this don't hurt.
Petkan
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