Re: [PATCH] flush_icache_page for sparc64

From: David S. Miller (davem@redhat.com)
Date: Mon Feb 14 2000 - 19:53:42 EST


   Date: Mon, 14 Feb 2000 18:47:57 -0500
   From: "Pat O'Rourke" <orourke@missioncriticallinux.com>

   It appears ia64 added a flush_icache_page() macro with a different
   signature than the one which already existed for sparc64. Here is
   a proposed patch to correct it.

It's wrong, we flush the icache for different reasons than
the interface which was added. The following is what I
sent to Linus and is the correct fix:

--- vanilla/linux/include/asm-sparc64/pgtable.h Sun Feb 13 10:31:07 2000
+++ linux/include/asm-sparc64/pgtable.h Mon Feb 14 04:15:54 2000
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.118 1999/12/21 21:24:35 davem Exp $
+/* $Id: pgtable.h,v 1.119 2000/02/14 02:53:44 davem Exp $
  * pgtable.h: SpitFire page table operations.
  *
  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
@@ -280,16 +280,18 @@
  * table.
  * 4) Splat.
  */
-extern void flush_icache_page(unsigned long phys_page);
+extern void __flush_icache_page(unsigned long phys_page);
 #define update_mmu_cache(__vma, __address, _pte) \
 do { \
         unsigned short __flags = ((__vma)->vm_flags); \
         if ((__flags & VM_EXEC) != 0 && \
             ((pte_val(_pte) & (_PAGE_PRESENT | _PAGE_WRITE | _PAGE_MODIFIED)) == \
              (_PAGE_PRESENT | _PAGE_WRITE | _PAGE_MODIFIED))) { \
- flush_icache_page(pte_pagenr(_pte) << PAGE_SHIFT); \
+ __flush_icache_page(pte_pagenr(_pte) << PAGE_SHIFT); \
         } \
 } while(0)
+
+#define flush_icache_page(vma, pg) do { } while(0)
 
 /* Make a non-present pseudo-TTE. */
 extern inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
--- vanilla/linux/arch/sparc64/mm/ultra.S Mon Dec 20 22:05:52 1999
+++ linux/arch/sparc64/mm/ultra.S Sun Feb 13 18:52:04 2000
@@ -1,4 +1,4 @@
-/* $Id: ultra.S,v 1.36 1999/12/15 15:45:18 davem Exp $
+/* $Id: ultra.S,v 1.37 2000/02/14 02:52:04 davem Exp $
  * ultra.S: Don't expand these all over the place...
  *
  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
@@ -132,8 +132,8 @@
          wrpr %g1, 0x0, %pstate
 
         .align 32
- .globl flush_icache_page
-flush_icache_page: /* %o0 = phys_page */
+ .globl __flush_icache_page
+__flush_icache_page: /* %o0 = phys_page */
         sethi %hi(1 << 13), %o2 ! IC_set bit
         mov 1, %g1
         srlx %o0, 5, %o0

-
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