Re: new IRQ scalability changes in 2.3.48

From: yodaiken@fsmlabs.com
Date: Wed Mar 08 2000 - 20:02:26 EST


On Fri, Mar 03, 2000 at 04:16:16PM +0100, Ingo Molnar wrote:
>
> On Fri, 3 Mar 2000 yodaiken@fsmlabs.com wrote:
>
> > Since we need a spin lock anyways in doIRQ, I still don't get how
> > this makes things any better.
>
> if different IRQs are delivered to different CPUs, then there is no global
> spinlock connection between them. Also see /proc/irq/*/smp_affinity. Eg.

I've been thinking about this change and still don't see what good it
does.
On a UP -- no change except code is more complex
On a SMP box performance loss without using affinity.
        Take two spinlocks instead of one, more cache boucing etc.
One a SMP box using affinit no gain over just using affinity
   except whn we assign edge interrupts for one cpu and level to
   a second and even then it is hard to imagine that it does anything
   good. I think you are optimizing for a coner case of an 8 way box at
   the expense of everything else.

The second problem is this idea of blocking _all_ interrupts on an IOAPIC
during the execution of a level interrupt handler. This seems like a definite
performance loss on a dual SMP where one processor would otherwise be able
to take and service an irq while the other handleed a different irq.

> if we localize a given IRQ to a single CPU, another IRQ source to another
> CPU then they will no more interact with each other. But the effect is
> there even in the generic case where APIC IRQs typically come in groups.
> (ie. the same CPU is used as a target for several IRQs, then another CPU
> is picked.)
>
> -- mingo
>
>
> -
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-- 
---------------------------------------------------------
Victor Yodaiken 
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