To spell it out:
The new changes offer some supposed increase in parallelism and reduced
cache ping if there are multiple irq controllers.
If an irq controller does not have atomic maskandack then it needs spinlocks
so under the new system there are 2 spinlocks needed in place of 1.
The io-apic does not have atomic mask-and-ack so it needs a spinlock. But
the new system evades this problem by postponing the ack until after the
driver irq handler runs.
interrupt:
do_IRQ
desc->ack() /* on a level triggered PCI irq this is now null*/
call driver
desc->end() /* on a level triggered PCI irq this is now ACK */
The result is that we don't need the extra spinlock, but we freeze
the IOAPIC until the ack. I don't know whether this freezes all
irqs or "only" irqs that are lower hardware priority, but it's a major
change in irq semantics and one with interesting performance implications.
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This archive was generated by hypermail 2b29 : Wed Mar 15 2000 - 21:00:17 EST