On Mar 25, Mark Hahn wrote:
> > hda: Maxtor 54098U8, 39082MB w/2048kB Cache, CHS=79406/16/63, (U)DMA
>
> bios sets the drive for dma, not udma.
>
> > IORDY=on/off, tPIO={min:120,w/IORDY:120}, PIO modes: mode3 mode4
> > UDMA modes: mode0 mode1 *mode2 mode3 mode4
>
> dma mode2 = 16 MB/s
are you really sure about this ? where can I check those dma modes ?
isn't mode4 UDMA66 ?
> > I've tried 'hdparm -m8 /dev/hda' and similar to change `MultSect=off'
> > but this doesn't make any difference.
>
> irrelevant for non-pio modes.
>
> > as UDMA66 only for the very innermost cylinders! there both PCs
> > give ~16.5 MB/sec.
>
> which is the peak speed of the mode you're using.
>
> > any idea/hint/suggestion what I can try to get better transfer rate
> > with my main board ?
>
> hdparm -X66? that would be mode2 udma (udma33).
I've tried this before and it didn't improve performace.
just tried again, here is the output:
# ./hdparm -X66 /dev/hda
/dev/hda:
setting xfermode to 66 (UltraDMA mode2)
and max. performace still is 16 MB/sec:(
so now I've tried
# ./hdparm -X67 /dev/hda
/dev/hda:
setting xfermode to 67 (UltraDMA mode3)
and
# ./hdparm -X68 /dev/hda
/dev/hda:
setting xfermode to 68 (UltraDMA mode4)
which gives the following kernel messages:
ide0: Speed warnings UDMA 3/4 is not functional.
ide0: Speed warnings UDMA 3/4 is not functional.
and `hdparm -I' and performace tests still show `UDMA mode 2' (16 MB/sec)
how can I set other DMA modes ?
the drive gives 28MB/sec with another main board and my main board/chipset
is specified to support UDMA33, so what's wrong ?!
here are the decoded settings for my VIA chipset:
# cat /proc/ide/via
Command register = 0x7
Master Read Cycle IRDY 1 Wait State
Master Write Cycle IRDY 1 Wait State
FIFO Output Data 1/2 Clock Advance: off
Bus Master IDE Status Register Read Retry: on
Latency timer = 64 (max. = 0)
Interrupt Steering Swap: off
------------------Primary IDE------------Secondary IDE-----
both channels togth: yes yes
Prefetch Buffer : on on
Post Write Buffer: on off
FIFO Conf/Chan. : 16 00
Threshold Prim. : 3/4 1/2
Read DMA FIFO flush: on on
End Sect. FIFO flush: on off
Max DRDY Pulse Width: No limitation
Bytes Per Sector: 512 512
--------------drive0------drive1-------drive0------drive1----
DMA enabled: yes yes yes yes
Act Pls Width: 03 11 11 11
Recovery Time: 02 09 09 09
Add. Setup T.: 4T 4T 4T 4T
------------------UDMA-Timing-Control------------------------
Enable Meth.: 1 0 0 0
Enable: yes no no no
Transfer Mode: PIO DMA DMA DMA
Cycle Time: 4T 5T 5T 5T
my best guess still is that this `4T' cycle time is wrong,
but even if I change this using `pcitweak -w 0:7:1 -b 0x53 0x60'
from XFree86 4.0 giving
------------------UDMA-Timing-Control------------------------
Enable Meth.: 0 0 0 0
Enable: yes no no no
Transfer Mode: PIO DMA DMA DMA
Cycle Time: 2T 5T 5T 5T
the performace doesn't change/improve:(
thanks for any further hint,
Harald
--
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Harald Koenig, \/\/\/\/\/\/\/\/\/
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This archive was generated by hypermail 2b29 : Fri Mar 31 2000 - 21:00:19 EST