On Fri, 21 Apr 2000, Linus Torvalds wrote:
>On Sat, 22 Apr 2000 kumon@flab.fujitsu.co.jp wrote:
>>
>> Spin-unlock is much worse case.
>> As stated in i386/spinlock.h "movb $0,%0" is far better than
>> "lock ; btrl $0,%0", mostly because of instruction serialization
>> caused by the locked operation.
>
>Yes.
>
>I have conflicting reports about the safety of "movb" from Intel.
>According to some people in there, "movb" is always safe, and there should
>not be any need for any config option at all.
>
>However, at the same time my original contact at intel was Andy Glew, who
>probably knows more about the ia32 core than anybody else I know. And Andy
>says that yes "movb" is legal, but that some very early P6 steppings may
>be buggy. And Andy is God.
>
>I'd hate to have a kernel that works 99% of the time but then has
>occasional problems on some very rare machines that are really hard to
>track down. But I'd _almost_ like to just make the movb the default and
>have a CONFIG_BROKEN_P6_ORDERING options for the very very special case.
Well, I had a patch doing just this I sent a few times back in the 2.3.4x
days but never heard any feedback at all from anyone.
In addition to the spinlock change, it seems to be making more sense these
days to make a "Generic" x86 kernel option and then make the specific
processors be optimized for that processor _only_. That way if you're
compiling anything other than a 586 or generic kernel, you can dump the
f00f check, for example. Then the generic kernel can be used instead of
the heavily overloaded 386 option.
As a fallback, I added all the specific processor options into Generic so
people could customize what it would run on. Distributions would just make
everything 386 compatible.
NOTE: I did not include an appropriate panic() in the startup code when
enabling the spin_unlock code because I do not know the appropriate models.
If someone knows what models it should be, I can add that in (or someone
else can, of course).
There's some other things that should be done if this patch is desired.
Firstly, many of the CONFIG_ options I used below should be negated to
get rid of the language trying to avoid a double negative. Secondly, the
processor options should be split up a bit more to allow for better
processor choices. For example, the Pentium Pro and Pentium II+ would be
separated so the spin_unlock optimization could be turned on whenever the
user does not pick Pentium Pro.
Anyway, this may or may not apply, it's 2.3.4x days.
diff -uprN linux/Documentation/Configure.help linux.x86gen/Documentation/Configure.help
--- linux/Documentation/Configure.help Tue Mar 7 18:57:13 2000
+++ linux.x86gen/Documentation/Configure.help Wed Mar 8 01:41:51 2000
@@ -125,6 +125,112 @@ CONFIG_X86_UP_IOAPIC
on IO-APIC-less systems with no slowdown at all. SMP kernels include
IO-APIC support unconditionally.
+Require working memory write protect
+CONFIG_X86_WP_WORKS_OK
+ If you enable this option, the kernel assumes your processor handles
+ writing to pages while in supervisor mode properly.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say N if you want to use a 386.
+ Otherwise it is safe to say Y.
+
+Require INVLPG instruction
+CONFIG_X86_INVLPG
+ This option enables the use of a CPU instruction introduced in later
+ x86 models. While not required, it can increase the speed of the
+ kernel.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say N if you want to use a 386.
+ Otherwise it is safe to say Y.
+
+Require BSWAP instruction
+CONFIG_X86_BSWAP
+ This option enables the use of a CPU instruction introduced in later
+ x86 models. While not required, it can increase the speed of the
+ kernel.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say N if you want to use a 386.
+ Otherwise it is safe to say Y.
+
+Assume no POPAD bug
+CONFIG_X86_POPAD_OK
+ Intel 386 processors may be hung from userspace by executing certain
+ instructions. If you're more familiar with Pentiums, think F00F bug.
+ Unlike the F00F bug, however, there is no workaround so this can
+ only print a warning message.
+
+ If you don't know what to do here, say N if you want to use a 386.
+ Otherwise it is safe to say Y.
+
+Require Time Stamp Counter (TSC)
+CONFIG_X86_TSC
+ This option enables the use of a CPU instruction introduced in later
+ x86 models. While not required, it can increase the speed of the
+ kernel.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say N if you want to use a 386,
+ 486, or non-Intel 586 class machine. Otherwise it is safe to say Y.
+
+Require Pentium Pro or better APIC
+CONFIG_X86_GOOD_APIC
+ The multi-processor local interrupt controller on Pentium and
+ earlier motherboards contains a bug in its write handling. Enable
+ this option to work around the problem.
+
+ If you enable this option and boot on a Pentium or earlier machine,
+ the kernel will panic before starting.
+
+ If you don't know what to do here, say Y if you have a Pentium Pro
+ or later machine. Otherwise say N.
+
+Require Page Global Enable (PGE)
+CONFIG_X86_PGE
+ Page Global Enable allows the kernel to keep certain maps of
+ memory always available. While not required, it can increase
+ the speed of the kernel.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say Y if you have a Pentium Pro
+ or later machine. Otherwise say N.
+
+Use AMD 3D Now! extensions
+CONFIG_X86_USE_3DNOW
+ This option enables the use of a CPU instruction introduced first
+ in late AMD K6 models. While not required, it can increase the
+ speed of the kernel.
+
+ If you enable this option and boot on a machine which does not do
+ the above, the kernel will panic before starting.
+
+ If you don't know what to do here, say N. Say Y if you own an AMD
+ CPU such as the K6-III, Athlon, or later.
+
+Fast unlocking for spinlocks
+CONFIG_X86_MOVB_SPIN_UNLOCK
+ Due to the memory ordering in x86 processors, the CPU bus on a
+ multi-processor system need not be locked in order to release
+ the software lock called a "spinlock." While not required, it
+ can increase the speed of the kernel.
+
+ This would be default, except that early Pentium Pro processors
+ contain a bug breaking that assumption.
+
+ If you don't know what to do here, say N if you want to run this
+ kernel on a Pentium Pro machine. Otherwise, say Y.
+
Kernel math emulation
CONFIG_MATH_EMULATION
Linux can emulate a math coprocessor (used for floating point
diff -uprN linux/arch/i386/Makefile linux.x86gen/arch/i386/Makefile
--- linux/arch/i386/Makefile Tue Mar 7 18:57:14 2000
+++ linux.x86gen/arch/i386/Makefile Wed Mar 8 01:39:36 2000
@@ -29,6 +29,11 @@ CFLAGS += $(shell if ! $(CC) -march=i486
# prevent gcc from keeping the stack 16 byte aligned
CFLAGS += $(shell if $(CC) -mpreferred-stack-boundary=2 -S -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-mpreferred-stack-boundary=2"; fi)
+ifdef CONFIG_MX86_GENERIC
+CFLAGS := $(CFLAGS) -m386 -DCPU=386
+AFLAGS := $(AFLAGS) -DCPU=386
+endif
+
ifdef CONFIG_M386
CFLAGS := $(CFLAGS) -m386 -DCPU=386
AFLAGS := $(AFLAGS) -DCPU=386
diff -uprN linux/arch/i386/config.in linux.x86gen/arch/i386/config.in
--- linux/arch/i386/config.in Tue Mar 7 18:57:14 2000
+++ linux.x86gen/arch/i386/config.in Wed Mar 8 01:41:51 2000
@@ -14,24 +14,52 @@ comment 'Code maturity level options'
bool 'Prompt for development and/or incomplete code/drivers' CONFIG_EXPERIMENTAL
endmenu
+#
+# CONFIG_MX86 would be better, but see a few lines above
+# for the problem with that. (CONFIG_X86)
+#
mainmenu_option next_comment
comment 'Processor type and features'
choice 'Processor family' \
- "386 CONFIG_M386 \
+ "Generic CONFIG_MX86_GENERIC \
+ 386 CONFIG_M386 \
486/Cx486 CONFIG_M486 \
586/K5/5x86/6x86 CONFIG_M586 \
Pentium/TSC CONFIG_M586TSC \
PPro/6x86MX CONFIG_M686 \
K6/II/III CONFIG_MK6 \
Athlon CONFIG_MK7" PPro
+
+#
+# Let the user customize their options here.
+#
+if [ "$CONFIG_MX86_GENERIC" = "y" ]; then
+ bool ' Require working memory write protect' CONFIG_X86_WP_WORKS_OK
+ bool ' Require INVLPG instruction' CONFIG_X86_INVLPG
+ bool ' Require BSWAP instruction' CONFIG_X86_BSWAP
+ bool ' Assume no POPAD bug' CONFIG_X86_POPAD_OK
+ bool ' Require Time Stamp Counter (TSC)' CONFIG_X86_TSC
+ if [ "$CONFIG_SMP" = "y" -o "$CONFIG_X86_LOCAL_APIC" = "y" ]; then
+ bool ' Require Pentium Pro or better APIC' CONFIG_X86_GOOD_APIC
+ fi
+ bool ' Require Page Global Enable (PGE)' CONFIG_X86_PGE
+ bool ' Use AMD 3D Now! extensions' CONFIG_X86_USE_3DNOW
+ if [ "$CONFIG_SMP" = "y" ]; then
+ bool ' Fast unlocking for spinlocks' CONFIG_X86_MOVB_SPIN_UNLOCK
+ fi
+fi
+
#
# Define implied options from the CPU selection here
#
-if [ "$CONFIG_M386" != "y" ]; then
+if [ "$CONFIG_M386" != "y" -a "$CONFIG_MX86_GENERIC" != "y" ]; then
define_bool CONFIG_X86_WP_WORKS_OK y
define_bool CONFIG_X86_INVLPG y
define_bool CONFIG_X86_BSWAP y
define_bool CONFIG_X86_POPAD_OK y
+fi
+if [ "$CONFIG_M686" != "y" -a "$CONFIG_MX86_GENERIC" != "y" ]; then
+ define_bool CONFIG_X86_MOVB_SPIN_UNLOCK y
fi
if [ "$CONFIG_M686" = "y" -o "$CONFIG_M586TSC" = "y" ]; then
define_bool CONFIG_X86_TSC y
diff -uprN linux/include/asm-i386/spinlock.h linux.x86gen/include/asm-i386/spinlock.h
--- linux/include/asm-i386/spinlock.h Tue Mar 7 18:56:29 2000
+++ linux.x86gen/include/asm-i386/spinlock.h Wed Mar 8 01:39:42 2000
@@ -67,8 +67,14 @@ typedef struct {
*
* Which is noticeably faster.
*/
+#ifdef CONFIG_X86_MOVB_SPIN_UNLOCK
+#define spin_unlock_string \
+ "movb $0,%0"
+#else
#define spin_unlock_string \
"lock ; btrl $0,%0"
+#endif
+
extern inline void spin_lock(spinlock_t *lock)
{
-
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