> At about line 327 of ../i386/kernel/8259.c, where the first ICW1 is
> moved into 0x20 "outb_p(0x11, 0x20) ...", and subsequent lines
> initializing both controllers, please change outb_p() to outb().
Then my 386 breaks. Sorry you lose. My 386 is AT compatible your system
is broken.
> This is essential because the "slow down I/O" that I first implemented,
> accesses port 0x80 to slow down I/O. When initializing these new
> chips, you can't write to another port during the initialization sequence.
The chip is not AT compatible. It is broken. File a bug report with AMD.
More seriously we are seeing hundreds of little patches for broken embedded
PC controller devices with flawed AT emulation, incorrect clocking on timer
chips and the like. Its possible that post 2.4 we need to split off an
pseudo-x86/ tree for such embedded devices.
Alan
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