[PATCH] Oops when requesting SiS IDE driver info, plus typo fix

From: t.n.vanderleeuw@chello.nl
Date: Thu Jun 01 2000 - 11:16:12 EST

Hello,

In Linux-2.4.0test1-ac7 I get the following oops when trying to

cat /proc/ide/sis

Using debugging printk's, I traced it to line 185 of file sis5513.c
where the UDMA cycle time is printed.
The OOPS goes away when I remove the __initdata from the definition of
the arrays.

I also have some doubt about line 188 btw, where the Data Active Time
is printed using reg for both channels (instead of using reg1 for the
2nd channel).

I fixed both in the included patch.

Other IDE drivers might have the same problem, but I haven't looked at
that since I currently don't have hardware to test that on.

And at line 127, the array recovery_time, has two entries "15 PCICLK".
Here my ignorance shines thru, but it would make more sense to me if
the last of those entries was supposed to be "16 PCICLK". Is this a
typo, or a misunderstanding on my part? I didn't change this.

I'm wondering, btw, why my chipset is always operated in compatible
mode, and not in native mode? It's a SiS5513/SiS5597 chipset.

--Tim.

--- linux/drivers/ide/sis5513.c.orig Thu Jun 1 16:14:21 2000
+++ linux/drivers/ide/sis5513.c Thu Jun 1 18:09:20 2000
@@ -111,12 +111,12 @@
 extern int (*sis_display_info)(char *, char **, off_t, int); /* ide-proc.c */
 static struct pci_dev *bmide_dev;
 
-static char *cable_type[] __initdata = {
+static char *cable_type[] = {
         "80 pins",
         "40 pins"
 };
 
-static char *recovery_time [] __initdata ={
+static char *recovery_time [] ={
         "12 PCICLK", "1 PCICLK",
         "2 PCICLK", "3 PCICLK",
         "4 PCICLK", "5 PCICLCK",
@@ -127,14 +127,14 @@
         "15 PCICLK", "15 PCICLK"
 };
 
-static char * cycle_time [] __initdata = {
+static char * cycle_time [] = {
         "Undefined", "2 CLCK",
         "3 CLK", "4 CLK",
         "5 CLK", "6 CLK",
         "7 CLK", "8 CLK"
 };
 
-static char * active_time [] __initdata = {
+static char * active_time [] = {
         "8 PCICLK", "1 PCICLCK",
         "2 PCICLK", "2 PCICLK",
         "4 PCICLK", "5 PCICLK",
@@ -185,7 +185,7 @@
         p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n",
                      cycle_time[(reg & 0x70) >> 4], cycle_time[(reg1 & 0x70) >> 4]);
         p += sprintf(p, " Data Active Time %s \t Data Active Time %s\n",
- active_time[(reg & 0x07)], active_time[(reg &0x07)] );
+ active_time[(reg & 0x07)], active_time[(reg1 &0x07)] );
 
         rc = pci_read_config_byte(bmide_dev, 0x40, &reg);
         rc = pci_read_config_byte(bmide_dev, 0x44, &reg1);
@@ -209,7 +209,7 @@
         p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n",
                      cycle_time[(reg & 0x70) >> 4], cycle_time[(reg1 & 0x70) >> 4]);
         p += sprintf(p, " Data Active Time %s \t Data Active Time %s\n",
- active_time[(reg & 0x07)], active_time[(reg &0x07)] );
+ active_time[(reg & 0x07)], active_time[(reg1 &0x07)] );
 
         rc = pci_read_config_byte(bmide_dev, 0x42, &reg);
         rc = pci_read_config_byte(bmide_dev, 0x46, &reg1);
@@ -536,7 +536,7 @@
 
                 pci_read_config_byte(dev, 0x52, &reg52h);
                 if (!(reg52h & 0x04)) {
- /* set IDE controller to operate in Compabitility mode obly */
+ /* set IDE controller to operate in Compabitility mode only */
                         pci_write_config_byte(dev, 0x52, reg52h|0x04);
                 }
 #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)

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