Re: [PATCH][CFT] dcache-ac6-D - dcache threading

• Next message: Tom Leete: "Re: [PATCH] ac7 Athlon-SMP"
• Previous message: kumon@flab.fujitsu.co.jp: "Re: dcache-ac6-D - dcache threading"
• In reply to: Andi Kleen: "Re: [PATCH][CFT] dcache-ac6-D - dcache threading"
• Next in thread: Alan Cox: "Re: [PATCH][CFT] dcache-ac6-D - dcache threading"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

Andi Kleen writes:
>
> For CONFIG_I386 CONFIG_X86_L1_CACHE_BYTES is 16, which would give lots
> of false sharing on pentium.
>
> Kumon, could you check that that is not the case ?

Here is the processor related part of autoconf.h:

/*
 * Processor type and features
 */
#undef CONFIG_M386
#undef CONFIG_M486
#undef CONFIG_M586
#undef CONFIG_M586TSC
#define CONFIG_M686 1
#undef CONFIG_MK6
#undef CONFIG_MK7
#define CONFIG_X86_WP_WORKS_OK 1
#define CONFIG_X86_INVLPG 1
#define CONFIG_X86_CMPXCHG 1
#define CONFIG_X86_BSWAP 1
#define CONFIG_X86_POPAD_OK 1
#define CONFIG_X86_L1_CACHE_BYTES (32)
#define CONFIG_X86_TSC 1
#define CONFIG_X86_GOOD_APIC 1
#define CONFIG_X86_PGE 1
#define CONFIG_X86_USE_PPRO_CHECKSUM 1
#undef CONFIG_MICROCODE
#define CONFIG_NOHIGHMEM 1
#undef CONFIG_HIGHMEM4G
#undef CONFIG_HIGHMEM64G
#undef CONFIG_MATH_EMULATION
#define CONFIG_MTRR 1
#define CONFIG_SMP 1

It seems L2 cache line size is defined as 32 bytes.

--
Computer Systems Laboratory, Fujitsu Labs.
kumon@flab.fujitsu.co.jp
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/

• Next message: Tom Leete: "Re: [PATCH] ac7 Athlon-SMP"
• Previous message: kumon@flab.fujitsu.co.jp: "Re: dcache-ac6-D - dcache threading"
• In reply to: Andi Kleen: "Re: [PATCH][CFT] dcache-ac6-D - dcache threading"
• Next in thread: Alan Cox: "Re: [PATCH][CFT] dcache-ac6-D - dcache threading"
• Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

This archive was generated by hypermail 2b29 : Wed Jun 07 2000 - 21:00:20 EST