On Mon, Jun 05, 2000 at 12:52:02PM +0100, Alan Cox wrote:
> > For CONFIG_I386 CONFIG_X86_L1_CACHE_BYTES is 16, which would give lots
> > of false sharing on pentium.
> >
> > Kumon, could you check that that is not the case ?
> >
> > At least for Williamette with bigger cache lines it prevents us from having
> > a single SMP kernel (or otherwise it requires wasting a lot of memory)
> >
> > Seems the times for single binary SMP kernel are over with 2.4.
>
> Depends on your performance needs. We can probably build a single SMP kernel
> with a bit of extra padding that works ok on all.
I guess it would make sense to add a ``CONFIG_GENERIC_CPU'' for that.
Giving CONFIG_386 64 byte cache lines would be stretching it.
-Andi
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