Re: [patch] 2.4.0-test6-pre8: Magic SysRq fixes for serial.c

From: Theodore Y. Ts'o (tytso@MIT.EDU)
Date: Wed Aug 09 2000 - 11:03:09 EST


   Date: Wed, 9 Aug 2000 17:13:45 +0200 (MET DST)
   From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>

> Not sure I'm following - the character preceding a break condition
> shouldn't be affected, unless you're talking about the 0 byte that
> gets put in the FIFO for every break condition, which should get
> dropped.

    BREAK is an asynchronous event and you may get one even when there are
   unreceived characters in the FIFO. I'm not sure how 8250 clones handle it
   -- I can't recall the null byte but I'd have to look up docs again. Some
   chips put a null character at the front, indeed.

Break is *not* an asynchoronous event. (It means that the RX line has
been pulled low for some period of time). The BI is only raised when
the associated null character in the FIFO is revealed at the top of the
FIFO. This is the standard behaviour defined by the 16550 UART, and any
clones which gets this wrong are broken.

                                                        - Ted

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