I've tried to boot 2.4.0-test9-pre2 yesterday and it halted at the point
where it tried to read the paratition table, outputing all sorts of
errors (SeekError, IIRC). So I replaced via82cxxx.c with the older
version from test6 and now it's working.
Here is what I see with the old via82cxxx.c:
dmesg:
Linux version 2.4.0-test9 (root@callisto.yi.org) (gcc version 2.95.2 19991024 (release)) #6 Tue Sep 19 01:02:39 IST 2000
BIOS-provided physical RAM map:
BIOS-e820: 000000000009fc00 @ 0000000000000000 (usable)
BIOS-e820: 0000000000000400 @ 000000000009fc00 (usable)
BIOS-e820: 0000000000010000 @ 00000000000f0000 (reserved)
BIOS-e820: 0000000000010000 @ 00000000ffff0000 (reserved)
BIOS-e820: 0000000003f00000 @ 0000000000100000 (usable)
Scan SMP from c0000000 for 1024 bytes.
Scan SMP from c009fc00 for 1024 bytes.
Scan SMP from c00f0000 for 65536 bytes.
Scan SMP from c0000000 for 4096 bytes.
On node 0 totalpages: 16384
zone(0): 4096 pages.
zone(1): 12288 pages.
zone(2): 0 pages.
mapped APIC to ffffe000 (01112000)
Kernel command line: BOOT_IMAGE=test9 ro root=1603 hdc=5606,255,63 idebus=33 ide0=ata66
ide_setup: hdc=5606,255,63
ide_setup: idebus=33
ide_setup: ide0=ata66
Initializing CPU#0
Detected 451029699 Hz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 897.84 BogoMIPS
Memory: 62672k/65536k available (912k kernel code, 2476k reserved, 70k data, 188k init, 0k highmem)
Dentry-cache hash table entries: 8192 (order: 4, 65536 bytes)
Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 4096 (order: 3, 32768 bytes)
CPU serial number disabled.
CPU: Intel Pentium III (Katmai) stepping 03
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
POSIX conformance testing by UNIFIX
mtrr: v1.36 (20000221) Richard Gooch (rgooch@atnf.csiro.au)
PCI: PCI BIOS revision 2.10 entry at 0xfb2c0, last bus=1
PCI: Using configuration type 1
PCI: Probing PCI hardware
PCI: Using IRQ router VIA [1106/0596] at 00:07.0
Activating ISA DMA hang workarounds.
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 4096 bind 4096)
Initializing RT netlink socket
Starting kswapd v1.8
pty: 256 Unix98 ptys configured
Uniform Multi-Platform E-IDE driver Revision: 6.31
ide: Assuming 33MHz system bus speed for PIO modes
VP_IDE: IDE controller on PCI bus 00 dev 39
VP_IDE: chipset revision 6
VP_IDE: not 100% native mode: will probe irqs later
VT 82C691 Apollo Pro
Chipset Core ATA-66
VP_IDE: ATA-66/100 forced bit set (WARNING)!!
Split FIFO Configuration: 8 Primary buffers, threshold = 1/2
8 Second. buffers, threshold = 1/2
ide0: BM-DMA at 0xe000-0xe007, BIOS settings: hda:DMA, hdb:DMA
ide0: VIA Bus-Master (U)DMA Timing Config Success
ide1: BM-DMA at 0xe008-0xe00f, BIOS settings: hdc:pio, hdd:pio
ide1: VIA Bus-Master (U)DMA Timing Config Success
hda: IBM-DHEA-36480, ATA DISK drive
hdb: ATAPI CDROM, ATAPI CDROM drive
hdc: IBM-DTLA-307045, ATA DISK drive
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
ide1 at 0x170-0x177,0x376 on irq 15
hda: 12692736 sectors (6499 MB) w/476KiB Cache, CHS=790/255/63, UDMA(33)
hdc: 90069840 sectors (46116 MB) w/1916KiB Cache, CHS=5606/255/63, (U)DMA
Partition check:
hda: hda1
hdc: hdc1 hdc2 hdc3 hdc4 < hdc5 >
VFS: Mounted root (ext2 filesystem) readonly.
Freeing unused kernel memory: 188k freed
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
Adding Swap: 136544k swap-space (priority -1)
Linux Tulip driver version 0.9.10 (September 6, 2000)
eth0: Macronix 98715 PMAC rev 32 at 0xe800, 00:80:AD:00:DB:BE, IRQ 11.
isapnp: Scanning for Pnp cards...
isapnp: Card '33600 bps FAX/Voice Internal Modem '
isapnp: 1 Plug & Play card detected total
Serial driver version 5.02 (2000-08-09) with MANY_PORTS SHARE_IRQ SERIAL_PCI ISAPNP enabled
ttyS00 at 0x03f8 (irq = 4) is a 16550A
ttyS01 at 0x02f8 (irq = 3) is a 16550A
ttyS02 at port 0x03e8 (irq = 5) is a 16550A
CSLIP: code copyright 1989 Regents of the University of California
PPP generic driver version 2.4.1
ip_tables: (c)2000 Netfilter core team
ip_conntrack (512 buckets, 4096 max)
PPP BSD Compression module registered
PPP Deflate Compression module registered
/proc/pci:
PCI devices found:
Bus 0, device 0, function 0:
Host bridge: VIA Technologies, Inc. VT82C693A/694x [Apollo PRO133x] (rev 34).
Prefetchable 32 bit memory at 0xe0000000 [0xe3ffffff].
Bus 0, device 1, function 0:
PCI bridge: VIA Technologies, Inc. VT82C598/694x [Apollo MVP3/Pro133x AGP] (rev 0).
Master Capable. No bursts. Min Gnt=12.
Bus 0, device 7, function 0:
ISA bridge: VIA Technologies, Inc. VT82C596 ISA [Mobile South] (rev 9).
Bus 0, device 7, function 1:
IDE interface: VIA Technologies, Inc. Bus Master IDE (rev 6).
Master Capable. Latency=32.
I/O at 0xe000 [0xe00f].
Bus 0, device 7, function 3:
Host bridge: VIA Technologies, Inc. VT82C596 Power Management (rev 0).
Bus 0, device 8, function 0:
Ethernet controller: Macronix, Inc. [MXIC] MX987x5 (rev 32).
IRQ 11.
Master Capable. Latency=32. Min Gnt=8.Max Lat=56.
I/O at 0xe800 [0xe8ff].
Non-prefetchable 32 bit memory at 0xe9000000 [0xe90000ff].
Bus 0, device 11, function 0:
Multimedia audio controller: Ensoniq ES1371 [AudioPCI-97] (rev 6).
IRQ 10.
Master Capable. Latency=64. Min Gnt=12.Max Lat=128.
I/O at 0xec00 [0xec3f].
Bus 1, device 0, function 0:
VGA compatible controller: nVidia Corporation Vanta [NV6] (rev 21).
IRQ 11.
Master Capable. Latency=32. Min Gnt=5.Max Lat=1.
Non-prefetchable 32 bit memory at 0xe4000000 [0xe4ffffff].
Prefetchable 32 bit memory at 0xe6000000 [0xe7ffffff].
/proc/ide/via:
Command register = 0x7
Master Read Cycle IRDY 1 Wait State
Master Write Cycle IRDY 1 Wait State
FIFO Output Data 1/2 Clock Advance: off
Bus Master IDE Status Register Read Retry: on
Latency timer = 32 (max. = 0)
Interrupt Steering Swap: off
------------------Primary IDE------------Secondary IDE-----
both channels togth: yes yes
Prefetch Buffer : on on
Post Write Buffer: on on
FIFO Conf/Chan. : 08 08
Threshold Prim. : 1/2 1/2
Read DMA FIFO flush: on on
End Sect. FIFO flush: on on
Max DRDY Pulse Width: No limitation
Bytes Per Sector: 512 512
--------------drive0------drive1-------drive0------drive1----
DMA enabled: yes yes yes no
Act Pls Width: 03 04 11 11
Recovery Time: 02 02 09 09
Add. Setup T.: 4T 4T 4T 4T
------------------UDMA-Timing-Control------------------------
Enable Meth.: 1 0 0 0
Enable: yes no no no
Transfer Mode: PIO DMA PIO DMA
Cycle Time: 3T 5T 5T 5T
Dan Aloni (dax)
karrde@callisto.yi.org
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This archive was generated by hypermail 2b29 : Sat Sep 23 2000 - 21:00:19 EST