On Thu, Nov 02, 2000 at 10:09:36AM -0800, Ulrich Drepper wrote:
> "Richard B. Johnson" <root@chaos.analogic.com> writes:
> > Yes. Look at the NMI count. Looks like every access produces a
> > NMI.
>
> I'm seeing this as well, but only with PIII Xeon systems, not PII
> Xeon. Every single timer interrupt on any CPU is accompanied by a NMI
> and LOC increment on every CPU.
Same happens with PIII CopperMine too.
I have Asus P2B-DS board and 1 GB RAM.
> CPU0 CPU1
> 0: 146727 153389 IO-APIC-edge timer
> [...]
> NMI: 300035 300035
> LOC: 300028 300028
/Matti Aarnio
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