> I was referring to the infamous CLI/STI combinations that are more
> analogous to spinlocks than anything you are talking about. spl levels are
> clean and transparent and have been doing a very nice job in helping to
> avoid race conditions in real unix systems for quite some time now.
It has nothing to do with smp ;)
spl levels are actually faster, because hardware interrupt locking
routines are poorly optimized in processors.
I looked at P-6 instruction timing table and found:
PUSHF 16 upos
POPF 17 uops
CLI 9 uops
STI 17 uops
I think soft interrupt locks like this would be better (at least on i386):
cli:
movb $0, intr_lock
sti:
movb $1, intr_lock
testb $1, intr_pending
jnz somewhere_away_to_handle_defered_interrupt
save_flags:
movb intr_lock, %al
restore_flags:
movb %al, intr_lock
testb %al, intr_pending
jnz somewhere_away_to_handle_defered_interrupt
And - of course - interrupt checks intr_lock in its entry and if it is
zero, sets intr_pending and exits immediatelly.
Mikulas
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This archive was generated by hypermail 2b29 : Mon Apr 23 2001 - 21:00:38 EST