> Observe that the PCI DWORD (long) register at DWORD offset 15 consists
> of 4 byte-wide registers (from the PCI specification), Max_lat,
> Min_Gnt, Interrupt pin, and interrupt line. Nothing has to fit into
> 4 bits, you have 8 bits. I haven't looked at the Linux code, but if
> it provides only 4 bits for the IRQ, it's broken.
I don't have the PCI specification, but at least some network cards
ignore all writes to that register. It's only an interface between the
bios and os. (pnic-82c168: "Interrupt Line. This 8-bit register will be
written by the POST software. The value of this register indicates which
input of the system interrupt controller PNIC's interrupt pin is
connected to."). The AC97 documentation says that only the low 4 bits
are writable. Perhaps it reconfigures itself if
someone writes to that register? Linux never writes to the low byte of
DWORD offset 15.
Greg, what's the value of 'dev->irq'? Usually drivers should never read
offset 3C, instead they should use 'dev->irq'.
arch/i386/kernel/mpparse should figure out where the interrupts arrive.
If that doesn't work: the MP table is documented at
and one of the debugging options in arch/i386/kernel/mpparse.c will
print all interrupt routing entries during boot up.
The routing entries are (bus, function and pin) -> io apic pin, and the
values for bus, function and pin are known.
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to email@example.com More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Mon Apr 30 2001 - 21:00:25 EST