> Ahh, that's a cpu bug -- one my athlons don't suffer from.
> Your Athlons may handle exclusive cache line acquisition more
> efficiently (due to memory subsystem performance) but it still
> does cost something.
On an exclusive line on Athlon a lock cycle is near enough free, its
just an ordering constraint. Since the line is in E state no other bus
master can hold a copy in cache so the atomicity is there. Ditto for newer
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This archive was generated by hypermail 2b29 : Sun Sep 30 2001 - 21:00:45 EST