On Mon, 01 Oct 2001 18:56:16 -0400,
"Rinaldi J. Montessi" <rinaldij@adelphia.net> wrote:
>I am of the impression that with the noapic parameter all calls are to
>be handled via CPU0, yet I am getting several errors on CPU1 as well.
noapic only affects external internal interrupts. Inter processor
interrupts (IPIs) always use the APIC bus. Ix86 SMP does a lot of
IPIs.
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This archive was generated by hypermail 2b29 : Sun Oct 07 2001 - 21:00:17 EST