> > I presume there is some overhead in bouncing to lowmem? I imagine that
> > highmem support for the HCDs wouldn't be that difficult -- they are just
> > PCI devices, after all.
>
> I'm unclear on what "bouncing to lowmem" involves, but I'd rather avoid
> teaching all three HCDs a second model for addressing transfer buffers.
AFAIK bouncing means a plain, physical copy.
Either the HCDs can do 64bit DMA or they can't.
Do you really expect there to be a significant number of 32bit machines
whose HCD can do 64bit DMA ?
If not, it's IMHO not worth doing it as you'd have either two kinds of
urbs or overhead in the common case.
On 64Bit machines we might have to deal with HCDs who can do 32Bit DMA
only. Perhaps there should be a gfp field in the usb_device struct
to export knowledge about the memory the HCD can cope with.
> > I'd rather eliminate as much overhead as possible -- I already get
> > complaints from performance fanatics about the inability of usb-storage to
> > get past 92% bus saturation (sustained), and the problem will only get
> > worse on USB 2.0
>
> Well then you'll be glad to see a patch from me, soonish, that teaches
> the usb-storage "transport" code to use bulk queueing. That'll get the
> bandwidth utilization up as high as it can get. It won't address any of
> these highmem issues though.
And there's the overhead of sleeping and waking a kernel thread. Larger io
requests might help, but I am not sure.
Regards
Oliver
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This archive was generated by hypermail 2b29 : Mon Jan 07 2002 - 21:00:16 EST