Re: Athlon/AGP issue update

From: Albert D. Cahalan (acahalan@cs.uml.edu)
Date: Wed Jan 23 2002 - 12:09:40 EST


David S. Miller writes:
> From: William Lee Irwin III <wli@holomorphy.com>

>> as there is essentially no infrastructure
>> for controlling the cacheable attribute(s) of user mappings now as
>> I understand it.
>
> Yes there most certainly are. The driver's MMAP method can fully edit
> the page protection attributes for that mmap area as it pleases.

That doesn't help for MAP_ANON pages.

That doesn't help when there are multiple useful cache settings.
It's not sane for every arch-independent driver to implement an
ioctl() or alternate devices. For PPC, you'd need 12 devices.

To a limited extent, the PPC can handle conflicting settings in
a useful manner. Not all 12 settings at once, but more than one.
BTW, reverse mappings could be useful for conflicting settings.

It is perfectly reasonable for a user to want non-coherent
memory and memory with odd caching behavior. It is not entirely
unreasonable to want large regions of memory to be BAT-mapped
for somewhat dedicated (Beowulf compute cluster) systems.

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