On Sat, 26 Jan 2002, Andi Kleen wrote:
> On Fri, Jan 25, 2002 at 05:53:57PM -0800, Linus Torvalds wrote:
> >
> > On 26 Jan 2002, Andi Kleen wrote:
> > >
> > > It doesn't explain the Athlon speedups. On athlon cli is ~4 cycles.
> >
> > .. and it probably serializes the instruction stream.
>
> I have word from AMD engineering that it doesn't stall the pipeline
> or serializes.
Note that it may not be the "cli" itself - the "iret" may be slower if it
has to enable interrupts that were disabled before. Ie the iret microcode
may have the equivalent of
/* Did eflags change? */
if ((new_eflags ^ old_eflags) & IF_MASK)
.. do sti/cli as appropriate ..
which would mean that the "cli" itself may take 4 cycles, but the "sti"
implicit in the iret will _also_ take 4 cycles and is optimized away when
not needed.
Which would add up to the 8 cycles needed for a ~3.4% speedup (this is
assuming the baseline is something like 250 cycles per system call, I've
not checked that assumption).
Linus
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