>>>>> On Thu, 14 Mar 2002 01:37:21 -0800, Richard Henderson <rth@twiddle.net> said:
Richard> This definitely needs to be per-architecture. On Alpha, I
Richard> think I can use the Thread Local Storage model to be added
Richard> to binutils 2.13 (and potentially compiler support to gcc
Richard> 3.[23]). IA-64 may be able to do the same. It's certain
Richard> that x86 can't, since the userland model requires %gs:0
Richard> point to the thread base, and the kernel folk would never
Richard> cotton to the segment swapping that would be needed.
Actually, on ia64 I want to use a pinned TLB entry to map the per-CPU
area. This has the advantage that accessing the local version of a
per-CPU variable has zero extra overhead. We have been doing this for
the cpu_info structure for a while now.
--david
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