From: Andreas Ferber <aferber@techfak.uni-bielefeld.de>
Date: Tue, 19 Mar 2002 02:37:55 +0100
Erm, you forgot COW semantics. The accesses to buffer are actually all
going to the same physical address. As CPU caches work on physical
addresses AFAIK (everything else would be just stupid ;-), there are
no cache misses (disregarding a few produced by IRQs/scheduling etc.).
ROFL, ignore that part of my postings then :-)
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