> Is there a way to disable IO read/writes to a PCI device. The bit 0
> of command register in PCI configuration space can be used to
> disable/enable memory-mapped IO but will it disable direct IO
> (what is the proper term?) as well?
There are two bits - IO enable and MMIO enable. They are the 0x1 and 0x2
bits in the command register, respectively.
> enable interrupts on vertical blanking without doing so on both
> cards (since they both respond to the same direct IO addresses).
umm, should they be on the same IO? I've never mucked with dual video
cards, but that sounds odd...
> Of course if I knew the addresses/offsets for memory-mapped versions
> of the appropriate registers on one card I could solve this problem
> but I do not neccesarily have that info.
The pci regions are easily readable - you should dig up a copy of the PCI
spec - very good reading....
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This archive was generated by hypermail 2b29 : Sun Jun 30 2002 - 22:00:14 EST