Re: [PATCH][RFC] per isr in_progress markers

From: Maciej W. Rozycki (macro@ds2.pg.gda.pl)
Date: Mon Sep 09 2002 - 14:38:20 EST


On Mon, 9 Sep 2002, Zwane Mwaikambo wrote:

> > Which is kind of sad. Is there some fast way to read the status of a
> > level-trigger irq off the IO-APIC in case it is still pending, and to do
> > the mitigation even for level-triggered?
>
> perhaps Remote IRR might help there?

 I don't think so. As far as I understand the I/O APIC operation, you
can't really know the state of an interrupt input when Remote IRR is set
(i.e. an interrupt from the input is being processed). You can only read
a sort of state of an input from the Delivery Status bit when Remote IRR
is cleared.

 For the i82489DX you could have read the state of an individual interrupt
request from the IRR register of the local unit handling the IRQ.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

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