"David S. Miller" <firstname.lastname@example.org> writes:
> From: john stultz <email@example.com>
> Date: 17 Sep 2002 13:29:18 -0700
> Some NUMA boxes do not have synced TSC, so on those systems your
> code won't work.
> It would have been really nice if x86 had specified a "system tick"
> register that incremented based upon the system bus cycles and thus
> were immune the processor rates.
It has - the local APIC timer. It has a tick register too that you can
read. Unfortunately it's buggy/unreliable on many systems. Linux uses
it for task scheduling and the local timer interrupt when it works,
but it's not really good enough for gettimeofday.
Microsoft/Intel have specified the HPET timer as replacement, but
it is still missing in many chipsets and buggy in others.
Also reading HPET is somewhat more costly than reading TSCs because it
goes to the southbridge, so there are cases where using TSC is
probably better (e.g. I think for networking packet time stamping the
TSC is just fine with all its limitations)
> I foresee lots of patches coming which basically are "how does this
> x86 system provide a stable synchronized tick source".
>From those who didn't implement HPET but some own spec like IBM.
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This archive was generated by hypermail 2b29 : Mon Sep 23 2002 - 22:00:20 EST