Re: Info: NAPI performance at "low" loads

From: Eric W. Biederman (
Date: Thu Sep 19 2002 - 09:58:49 EST

Alan Cox <> writes:

> On Wed, 2002-09-18 at 18:27, Eric W. Biederman wrote:
> > Plus I have played with calibrating the TSC with outb to port
> > 0x80 and there was enough variation that it was unuseable. On some
> > newer systems it would take twice as long as on some older ones.
> port 0x80 isnt going to PCI space.

Agreed. It isn't going anywhere, and it takes it a while to recogonize
> x86 generally posts mmio write but not io write. Thats quite measurable.

The difference timing difference between posted and non-posted writes
I can see.


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