On 22 Oct 2002, Alan Cox wrote:
> Actually I know a few. 2Tb is cheap - its one pci controller and eight
> ide disks.
what we can do is to still use the linear mapping, ie. to impose the limit
only on fremap() users. This is ugly but works. It needs quite some
hacking though, since at the point of pagecache-pte zapping we dont have a
vma handy, so we cannot tell from the pte alone whether it's mapped
linearly or not. We could perhaps use the free bit in the pte to signal
this condition, but i'm not sure whether this is possible on every
architecture. Are there architectures that has no freely OS-usable bit in
the pte?
the limit will become even more prominent once i've moved the protection
bits into the swap pte format as well - that reduces the fremap() limit to
0.5 Tb, for 32-bit ptes.
(there's no real reason to keep the offset in the pte in the linearly
mapped case anyway, besides some vague 'symmetry' arguments.)
Ingo
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This archive was generated by hypermail 2b29 : Wed Oct 23 2002 - 22:01:00 EST