On Wed, Nov 20, 2002 at 07:48:27PM +0100, Steffen Persvold wrote:
> > > <6>CPU: L1 I cache: 0K, L1 D cache: 8K
> Yep that works (I have two Xeon boxes with the same issue) :
> But why does this P4 Trace cache report as L1 I cache on 2.4.18 ?
Look again above, and you'll see .18 said it had 0K L1 (which is
correct, L1 != Trace cache).
> Does this have any implications on the 2.4.18 performance (or the
> 2.4.20-rc2 performance without the descriptors.diff) ?
The SMP weighting should be done with L2 cache size, which
was correct on .18 too, so it should be ok.
Dave
-- | Dave Jones. http://www.codemonkey.org.uk | SuSE Labs - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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