manfred@colorfullife.com said:
> This is not entirely correct: The driver must use the normal memory
> barrier instructions even in coherent memory. Could you copy the
> section about wmb() from DMA-mapping into your new documentation?
I made the name change from consistent to coherent (at David Mosberger's)
request to address at least some of this.
I suppose I can add it as a note to dma_alloc_coherent too.
> Noone obeys that rule, and it's not trivial to fix it.
Any driver that disobeys this rule today with the pci_ API is prone to cache
related corruption on non-coherent architectures.
> Is it really impossible to work around that in the platform specific
> code? In the worst case, the arch code could memcopy to/from a
> cacheline aligned buffer.
Well, it's not impossible, but I don't believe it can be done efficiently.
And since it can't be done efficiently, I don't believe it's right to impact
the drivers that are properly written to take caching effects into account.
Isn't the better solution to let the platform maintainers negotiate with the
driver maintainers to get those drivers they care about fixed?
James
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Tue Dec 31 2002 - 22:00:11 EST