> host shall wait 400 ns before reading the Status register. When entering
> this state from the HPIOI2 state, the host shall wait one PIO transfer
> cycle time before reading the Status register. The wait may be
> accomplished by reading the Alternate Status register and ignoring the
> result.
Fatal on PIIX PIO
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This archive was generated by hypermail 2b29 : Wed Jan 15 2003 - 22:00:47 EST