[1/2][via-rhine][PATCH] reset logic

From: Roger Luethi (rl@hellgate.ch)
Date: Thu Feb 27 2003 - 06:45:04 EST

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Since Linus and Jeff raised the issue of PCI posted writes, I cleaned up
wait_for_reset() some more. Experiments show that with MMIO, a reset may
indeed take seemingly longer -- that is fixed by flushing that buffer.

Also, the driver now polls the appropriate register while waiting for the
reset to finish.

text/plain attachment: via-rhine-1.17rc-01_reset.diff

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