Re: [Lse-tech] [PATCH][ANNOUNCE] 32way/8quad NUMAQ booting with 16 IOAPICs, 223 IRQs

From: William Lee Irwin III (wli@holomorphy.com)
Date: Mon Mar 17 2003 - 00:54:15 EST


On Mon, Mar 17, 2003 at 12:21:42AM -0500, Zwane Mwaikambo wrote:
> I've managed to put together a patch which allows a NUMAQ box with
> more than 8 IOAPICs to boot, the current workaround is to force it to 8
> or lower. This was achieved by setting up percpu idts thus allowing
> us to implement per node vector spaces. The previous hurdle was running out
> of vectors to assign, the current one is running out of irqs, something
> which i'll further be looking at.
> Later on i'm planning to move to per node IDTs so that i can fix f00f
> workaround and also save space on nodeless systems. To do this will
> probably require early_cpu_to_node workalikes (or perhaps just use
> logical_smp_processor_id and apic_to_node).
> Thanks to the folks at OSDL (and Mark for giving up his 4quad for so
> long) for providing me access to the 8quad.

Running out of IRQ's? Simply jacking up NR_IRQS and HARDIRQ_BITS should
suffice if this is what I think it is.

-- wli
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/



This archive was generated by hypermail 2b29 : Sun Mar 23 2003 - 22:00:19 EST