Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this

[Matt Porter]

On Fri, Aug 29, 2003 at 06:35:10AM +0100, Jamie Lokier wrote:
> Anyway, please lots of people run the program and post the output +
> /proc/cpuinfo.  Compile with optimisation, -O or -O2 is fine.  (You
> can add -DHAVE_SYSV_SHM too if you like):
> 
> 	gcc -o test test.c -O2
> 	time ./test
> 	cat /proc/cpuinfo

PPC440GX, non cache coherent, L1 icache is VTPI, L1 dcache is PTPI

-----

440gx-1:~/cachetest# gcc -o test test.c -O2
440gx-1:~/cachetest# time ./test
Test separation: 4096 bytes: pass
Test separation: 8192 bytes: pass
Test separation: 16384 bytes: pass
Test separation: 32768 bytes: pass
Test separation: 65536 bytes: pass
Test separation: 131072 bytes: pass
Test separation: 262144 bytes: pass
Test separation: 524288 bytes: pass
Test separation: 1048576 bytes: pass
Test separation: 2097152 bytes: pass
Test separation: 4194304 bytes: pass
Test separation: 8388608 bytes: pass
Test separation: 16777216 bytes: pass
VM page alias coherency test: all sizes passed

real	0m0.193s
user	0m0.140s
sys	0m0.010s
440gx-1:~/cachetest# cat /proc/cpuinfo
cpu		: 440GX Rev. A
revision	: 24.80 (pvr 51b2 1850)
bogomips	: 624.23
vendor		: IBM
machine		: PPC440GX EVB (Ocotea)
440gx-1:~/cachetest# 

-- 
Matt Porter
mporter@xxxxxxxxxxxxxxxxxxx
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