Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this
From: Jamie Lokier
Date: Mon Sep 01 2003 - 01:02:10 EST
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Matt Porter wrote:
> PPC440GX, non cache coherent, L1 icache is VTPI, L1 dcache is PTPI
The cache looks very coherent to me.
-- Jamie
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