Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this

From: Jamie Lokier
Date: Tue Sep 02 2003 - 00:42:39 EST


Matt Porter wrote:
> Exactly. After reading some other subthreads I see the other version of
> "cache coherency" that Jamie is interested in.

Indeed, quite a lot of systems don't offer cache coherence with
peripherals, other CPUs (if any) and in some cases even with other
tasks on the same CPU. Isn't memory fun? :)

-- Jamie
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