Re: [patch] Make slab allocator work with SLAB_MUST_HWCACHE_ALIGN

[Ravikiran G Thirumalai]

On Sun, Sep 14, 2003 at 06:30:37PM +0530, Dipankar Sarma wrote:
> 
> While we are at it, we should also probably look up the cache line
> size for a cpu family from a table, store it in some per-cpu data
> (cpuinfo_x86 ?) and provide an l1_cache_bytes() api to
> return it at run time.

If we are going to solve the cache line size mismatch due to compile 
time arch versus run time arch (compiling on a PIII and running on a P4), 
we might end up with kernel code which sometimes refer to the static line size 
and sometimes to the run time size, which might cause correctness issues.  
So maybe it is good idea to have just one macro for l1 size?  We can't
do away with the static one, so maybe we should keep it and expect users
to compile with the target cpu properly set (otherwise they lose out on
performance -- correctness won't be a problem).  I could be wrong...just
thinking out loud...

Thanks,
Kiran
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