Re: Fixes for nforce2 hard lockup, apic, io-apic, udma133 covered

[Josh McKinney]

On approximately Mon, Dec 15, 2003 at 11:54:32PM +1000, Ross Dickson wrote:
> <snip>
> 
> Out of curiosity of the 10 lines with predelay count like follows
> 
> ..APIC TIMER ack delay, predelay count: 20769 
> 
> Do any of them exceed your safe count of 20779? and any really close
> in value to the reload count of 20791?
> 

I have an Asus A7N8X deluxe rev. 2, so no BIOS updates. I am running
2.6.0-test11-wli-2 with your(Ross Dickson) two patches that I diffed
for 2.6.  Default delay times, 19hrs uptime, grep tested.

..APIC TIMER ack delay, reload:25053, safe:25038
..APIC TIMER ack delay, predelay count:24988 
..APIC TIMER ack delay, predelay count:24954 
..APIC TIMER ack delay, predelay count:25011 
..APIC TIMER ack delay, predelay count:24970 
..APIC TIMER ack delay, predelay count:25032 
..APIC TIMER ack delay, predelay count:24991 
..APIC TIMER ack delay, predelay count:24949 
..APIC TIMER ack delay, predelay count:25013 
..APIC TIMER ack delay, predelay count:24971 
..APIC TIMER ack delay, predelay count:24928 

> On our pheonix bios's we regularly see 2 or 3 of them exceed the safe count
> (indication of potential lockup without the patch) often with one of them 
> within 4 counts of the reload value (really quick).
> 
> Can you also advise if your bios setting of the  "C1 disconnect" is set to on, off,
> or auto? - trying to gain a clue as to how award can have disconnect running
> and avoid lockups.
> 

athcool version 0.3.1

nVIDIA nForce2 (10de 01e0) found
'Halt Disconnect and Stop Grant Disconnect' bit is enabled.

> Also are you running with DDR333 or DDR400 ram and how many sticks?
> 

1 stick, DDR400 Corsair, 5-2-2-2

> I have heard lockups are not supposed to happen at all if the fsb (host bus
> clock speed) matches the ddr speed. One of my systems went about 4 hours
> (xp2500 333fsb, DDR333) without the apic delay patch on a pheonix bios
> before lockup.
> 
I run sync memory timings and have seen pretty good uptimes without
the patches.

> So far it appears to be safe with a barton core cpu to read the local apic
> timer count register as the v2 apic delay patch does. 
> 

I am running the barton core here, so far so good it seems.  Time will
only tell I guess.  We are getting in the right direction I hope.

> So far I cannot use my v2 apic delay patch for long periods with my throughbred
> core XP2200 without hard lockups (pheonix bios, fsb266, DDR400 ram).
> 
> Regards
> Ross.
> 
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