Re: Why no interrupt priorities?

[Michael Frank]

On Fri, 27 Feb 2004 16:32:48 +1100, Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx> wrote:

> > Is the assumption that hardirq handlers are superfast also the reason
> > why Linux calls all handlers on a shared interrupt, even if the first
> > handler reports it was for its device?
>
> With level irqs only, it would be possible to return at this
> point. But with edge irqs, we could miss it completely if another
> device had an irq at the same time

Is this to imply that edge triggered shared interrupts are used anywhere?

Never occured to me to use shared IRQ's edge triggered as this mode
_cannot_ work reliably for HW limitations.

Consider this scenario:

Two devices A) having it's IRQa and B) with it's IRQB.
Both devices "ored" on IRQBUS.

For simplicity lets assume these timings:
	IRQa,IRQB > IRQBUS: 		10ns
	IRQx transition time 		10ns
	PIC IRQ latch recovery time	10ns
	  This is the time IRQBUS input must be passive
	  for another edge on it to be detected

Here, by murphy IRQb arrives at the same time IRQa is reset.

Lets say one step (hyphen) is 5 ns
~ is a break in time
^ is a instable state glitch

          /-------~--------\	
IRQa  ---/                  \-------~------

                            /-------~------
IRQb  ------------~--------/

            /-----~--------^^-------~------
IRQBUS-----/


So, as you can see, IRQb gets lost as the PIC IRQ latch recovery
time is violated.

A work around would be to poll the _entire_ chain once more before
exiting the ISR - this would be rather clumsy though.

Regards
Michael
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