Re: Broadcom gigabit solution for Jeff.

[walt]

David S. Miller wrote:
> On Tue, 16 Mar 2004 15:21:40 -0800
> walt <wa1ter@xxxxxxxxxxxxx> wrote:
>
>
> > ...this is the first time I've tried the driver from Broadcom, so I can't
> > tell you when it was fixed...
>
>
> The current driver in the current 2.4.x and 2.6.x pre-release trees should
> have this bug fixed in the tg3 driver.

I admit I seem to be the only one still complaining, so I suspect I must have
a mobo with a rare chip type.  The bug is definitely *not* fixed for me, as of
today's latests changesets from Linus.

The problem lies in the way the chip is initialized on bootup, clearly, because
doing ifconfig down/up changes a few bytes of memory and starts things working
until the next reboot.

Here is a before/after diff of lspci -xxx.  You can see that byte 0x94 has been
reset by the ifconfig down/up:

#diff before after
83,89c83,89
< 90: 09 02 00 01 01 00 00 00 00 00 00 00 c8 00 00 00
< a0: 00 00 00 00 00 00 00 00 00 00 00 00 03 00 00 00
< b0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00
< c0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00
< d0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00
< e0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00
< f0: 00 00 00 00 01 00 00 00 00 00 00 00 01 00 00 00
---
> 90: 09 02 00 01 00 00 00 00 00 00 00 00 c8 00 00 00
> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

I wish I had the expertise to figure out what code is responsible
for resetting that bit, but alas I don't.

If you could give me even a hint of what sections of the tg3 code
to look at I might be able to pick it up from there -- e.g. what
part of the driver code would be exercised by 'ifconfig down' that
isn't done by the 'ifconfig up' at bootup.
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