[PATCH] explicity align tss->stack

[Brian Gerst]

Use an alignment attribute on the stack member of struct tss_struct 
instead of padding.  Also mark the limit of the TSS segment.

--
				Brian Gerst
diff -urN linux-2.6.9-rc1-bk/include/asm-i386/desc.h linux/include/asm-i386/desc.h
--- linux-2.6.9-rc1-bk/include/asm-i386/desc.h	2004-08-25 11:52:00.000000000 -0400
+++ linux/include/asm-i386/desc.h	2004-09-04 09:20:29.216440282 -0400
@@ -47,7 +47,7 @@
 static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
 {
 	_set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[entry], (int)addr,
-		offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
+		offsetof(struct tss_struct, tss_limit) - 1, 0x89);
 }
 
 #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
diff -urN linux-2.6.9-rc1-bk/include/asm-i386/processor.h linux/include/asm-i386/processor.h
--- linux-2.6.9-rc1-bk/include/asm-i386/processor.h	2004-09-03 02:13:03.000000000 -0400
+++ linux/include/asm-i386/processor.h	2004-09-04 09:20:40.573961012 -0400
@@ -391,14 +391,11 @@
 	 * be within the limit.
 	 */
 	unsigned long	io_bitmap[IO_BITMAP_LONGS + 1];
-	/*
-	 * pads the TSS to be cacheline-aligned (size is 0x100)
-	 */
-	unsigned long __cacheline_filler[37];
+	unsigned long	tss_limit[0];
 	/*
 	 * .. and then another 0x100 bytes for emergency kernel stack
 	 */
-	unsigned long stack[64];
+	unsigned long	stack[64] __attribute__((aligned(0x100)));
 } __attribute__((packed));
 
 #define ARCH_MIN_TASKALIGN	16