[sparc32] add atomic_sub_and_test() to make reiser4 code microoptimized for x86 compile on sparc32

[William Lee Irwin III]

On Tue, Sep 14, 2004 at 02:10:45AM -0700, William Lee Irwin III wrote:
> The only point I had to make was that I'd rather avoid adding arch
> hooks for code that will never be run on the arch. I suppose for the
> sake of compiletesting...

Repost with appropriate Subject: line (I'm trying to cut down on these).


-- wli

Add atomic_sub_and_test() to sparc32, implemented in terms of
atomic_sub_return(),  so reiser4 can be simultaneously microoptimized
for x86 and made to pass compilation testing on sparc32.


Index: mm5-2.6.9-rc1/include/asm-sparc/atomic.h
===================================================================
--- mm5-2.6.9-rc1.orig/include/asm-sparc/atomic.h	2004-08-13 22:37:25.000000000 -0700
+++ mm5-2.6.9-rc1/include/asm-sparc/atomic.h	2004-09-14 01:59:51.579542880 -0700
@@ -46,6 +46,7 @@
 #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
 
 #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
+#define atomic_sub_and_test(v) (atomic_sub_return(v) == 0)
 
 /* This is the old 24-bit implementation.  It's still used internally
  * by some sparc-specific code, notably the semaphore implementation.
-
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