Re: [PATCH] pci-mmconfig fix for 2.6.9

From: Grant Grundler
Date: Fri Nov 12 2004 - 13:36:58 EST

On Fri, Nov 12, 2004 at 09:52:17AM -0800, Michael Chan wrote:
> On Wednesday, November 10, 2004 11:58 PM Andi Kleen wrote:
> > Where is it guaranteed that these writes are non posted?
> Intel chipset engineer confirmed that they are non-posted.

Thanks for digging that up.
I think Andi was looking for references to the PCI-E spec.
I found such a statement in "PCI Express(TM) Base Specification
Revision 1.0a".

Table 2-3 on page 47 says:
| Cpl 00 0 1010 Completion without Data Used for I/O and
| Configuration Write Completions and Read
| Completions (I/O, Configuration, or
| Memory) with Completion Status other than
| Successful Completion.

Section "2.2. Transaction Layer Protocol - Packet Definition"
| Transactions are carried using Requests and Completions. Completions
| are used only where required, for example, to return read data, or
| to acknowledge Completion of I/O and Configuration Write Transactions.
| Completions are associated with their corresponding Requests by the value
| in the Transaction ID field of the Packet header.

And "2.6.1 Flow Control Rules":
| Flow Control distinguishes three types of TLPs (note relationship
| to ordering rules see Section 2.4):
| Posted Requests (P) Messages and Memory Writes
| Non-Posted Requests (NP) All Reads, I/O, and Configuration Writes
| Completions (CPL) Associated with corresponding NP Requests

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