Re: page table lock patch V15 [0/7]: overview II

[Nick Piggin]

Andi Kleen wrote:
> > I have a question for the x86 gurus. We're currently using the lock
> > prefix for set_64bit. This will lock the bus for the RMW cycle, but
> > is it a prerequisite for the atomic 64-bit store? Even on UP?
>
>
> An atomic 64bit store doesn't need a lock prefix. A cmpxchg will
> need to though.

Are you sure the cmpxchg8b need a lock prefix? Sure it does to
get the proper "atomic cmpxchg" semantics, but what about a
simple 64-bit store... If it boils down to 8 byte load, 8 byte
store on the memory bus, and that store is atomic, then maybe
a lock isn't needed at all?

I think when emulating a *load*, then the lock is needed, because
otherwise the subsequent store may overwrite some value that has
just been stored by another processor.... but for a store I'm not
so sure.

> Note that UP kernels define LOCK to nothing.

Yes. In this case (include/asm-i386/system.h:__set_64bit), it
is using lowercase lock, which I think is not defined away,
right?


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